FIG. 1 shows an example of a conventional DC-DC converter. In FIG. 1, a series circuit, which includes a switching element Q1 formed of a MOSFET and the like as well as a switching element Q2 formed of a MOSFET and the like, is connected to a direct-current power source Vi. In addition, a series circuit including a reactor L and a smoothing capacitor Co is connected in parallel to the switching element Q1 at its two ends. A control circuit 10a alternately turns on and off the switching element Q1 and the switching element Q2, whereby an output voltage Vo is obtained from the two ends of the smoothing capacitor Co.
In other words, the DC-DC converter is formed of a general step-down chopper circuit including the switching element Q2, the reactor L, a parasitic diode of the switching element Q1, and the smoothing capacitor Co. The DC-DC converter is the synchronously-rectifying step-down chopper circuit in which a MOS-FET portion of the switching element Q1 is switched on and off in accordance with a conduction period of the parasitic diode of the switching element Q1.
The DC-DC converter operates in the following manner. Firstly, the switching elements Q1, Q2 are operated under switching control based on gate drive signals LD, HD from the control circuit 10a, respectively. FIG. 2 shows a detailed configuration diagram of the control circuit 10a. The control circuit 10a includes a triangular wave oscillator OSC, a PWM comparator COMP, an operational amplifier DAMP serving as an error amplifier, a reference voltage Es, a resistor Rs, a resistor Rf, a capacitor Cf, an inverter INV, dead time generator circuits DT1, DT2, a level shifter circuit LST, and buffer circuits BUF1, BUF2.
A feedback (FB) terminal receives the output voltage Vo of the smoothing capacitor Co as a feedback voltage. The operational amplifier CAMP compares the feedback voltage inputted from the FB terminal through the resistor Rs with the reference voltage Es, and outputs a comparison result as an error signal to a non-inverting terminal of the comparator COMP.
The comparator COMP compares the error signal from the operational amplifier DAMP with a triangular wave signal from the triangular wave oscillator OSC, and generates a PWM signal. The dead time generator circuit DT2 adds a predetermined dead time to the PWM signal. The level shifter circuit LST coverts the PWM signal with the predetermined dead time added thereto into a predetermined-level PWM signal. The buffer circuit BUF2 outputs the converted predetermined-level PWM signal, as a high side gate drive signal HD, to a gate of the switching element Q2. Thus, the ON/OFF of the switching element Q2 is controlled.
Meanwhile, the inverter INV inverts the PWM signal, the dead time generator circuit DT1 adds a dead time to the PWM signal, and the buffer circuit BUF1 outputs the PWM signal with the dead time added thereto, as a low side gate drive signal LD, to a gate of the switching element Q1. Thus, the ON/OFF of the switching element Q1 is controlled complementarily to the ON/OFF of the switching element Q2. FIG. 3 shows waveforms at the units in the control circuit 10a. 
FIGS. 4A to 4C show waveforms at the components in the conventional DC-DC converter. FIG. 4A shows the waveforms at a heavy load; FIG. 4B, at a medium load; and FIG. 4C, at a light load. When the switching element Q2 is turned on, the direct-current power source Vi applies a voltage VL to the reactor L.
The voltage VL is expressed withVL=input voltage Vi−output voltage Vo. A gradually-increasing current IL flows through the reactor L. When the switching element Q2 is turned off, a current stops flowing to the switching element Q2, and is commutated to the parasitic diode of the switching element Q1. During this commutation, once the switching element Q1 is turned on, a current IQ1 of the switching element Q1 flows to the MOS-FET portion of the switching element Q1. A saturation voltage Vron (Q1) at this time is expressed withVron=reactor current IL×ON resistance Ron of switching element Q1.For this reason, if a MOS-FET having a small ON resistance Ron is selected, the saturation voltage Vron is made smaller than a forward voltage Vf of the parasitic diode, and the loss in the switching element Q1 at the time of turning on can be reduced.
While the DC-DC converter is in a continuous current mode in which the current IL flows even while the switching element Q1 is OFF, the ON widths of the switching elements Q1, Q2 remain almost unchanged as in FIGS. 4A and 4B.
FIG. 5 shows an example of another conventional DC-DC converter. In the example shown in FIG. 5, a series circuit of a switching element Q1 and a reactor L is connected to both ends of a direct-current power source Vi. The cathode of a diode is connected to one end of the reactor L is connected to, while the positive electrode of a smoothing capacitor is connected to the other end of the reactor L. The anode of a diode Do and the negative electrode of the smoothing capacitor Co are connected to one end of a resistor Ra, while a FB terminal of a control circuit 10b is connected to the other end of the resistor Ra.
FIG. 6 shows a detailed configuration block diagram of the control circuit in the DC-DC converter shown in FIG. 5. The control circuit 10b includes a triangular wave oscillator OSC, a PWM comparator COMP, an operational amplifier OAMP, a reference voltage Es, a reference voltage Eb, a resistor Rs, a resistor Rb, a resistor Rf, a capacitor Cf, a dead time generator circuit DT2, a level shifter circuit LST, and a buffer circuit BUF2. FIG. 7 shows waveforms at the units in the control circuit shown in FIG. 6. FIGS. 8(a) to 8(f) show waveforms at the components in the DC-DC converter shown in FIG. 5.
Note that a technique described in Japanese Patent Application Publication No. 2009-44814, for example, is known as the conventional technique.
However, when the load becomes light, the DC-DC converter enters a discontinuous current mode in which, as shown in FIG. 4C, no current flows while the switching element Q1 is OFF. In other words, if power consumption of the load falls below energy accumulated in the reactor L per switching, the ON width of the switching element Q1 needs to be narrowed. In this respect, the response characteristic of the operational amplifier OAMP cannot keep up with sharp load changes between the heavy and light loads. This causes a problem of upward and downward fluctuation in the output voltage Vo. To compensate the insufficiency of the response characteristic, a countermeasure is required, such as considerably increasing the capacity of the smoothing capacitor Co.
In addition, making a transient response of the operational amplifier OAMP faster leads to reducing a phase margin of a feedback system for the entire DC-DC converter, and poses a problem that the control system becomes unstable.